AN2476 Datasheet, PDF (15/49 Pages) STMicroelectronics – STR75x low power modes

AN2476
Power supply and clocks
If an interrupt occurs during this sequence, the MCU will not enter Low Power Mode after
completing the sequence, but will serve the interrupt instead.
In both cases, software must then reexecute the low power bit writing sequence to
effectively go into low power mode. It is possible to determine if the low power mode was
entered by reading the LP and LP_DONE bits status after wake-up.
It is mandatory to follow this flow chart to manage the low power mode:
Figure 9. Mandatory software flow for entering low power mode
Main Program
Write LP to ‘1’
Write LP to ‘1’
1
Write LP to ‘0’
Write LP to ‘1’
1 Dedicated LP entry sequence
Read LP
2
LP=’0’ ?
N
Y
Read LP_DONE
2 Wait for Low Power entry time
3
Low Power not executed, sequence
should be re-done(bad sequence or
IRQ during sequence)
4
Low Power successfully executed
LP_DONE should cleared.
Interrupt Routine
3
LP_DONE=’1’ ?
N
Y
4
Write LP_DONE to ‘0’
Main Program
to be continued
The choice of low power mode entered with this sequence depends on the state of the
LPMC bits described in the Table 1 on page 15.
These bits can be set in the MRCC_PWRCTRL register. See Reference Manual for more
detail.
Table 1. Low Power mode selection
Control bits
LPMC[1:0] BURST WFI_FLASH_EN
Low Power Mode Selected
0
0
-
-
STOP Mode
0
1
-
-
Software Reset
0
0
WFI, Flash disabled (DMA not allowed in WFI)
0
1
0
1
1
1
WFI, Flash enabled (DMA allowed in WFI)
0
Forbidden
1
WFI, Flash enabled (DMA allowed in WFI)
1
1
-
-
STANDBY Mode
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