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AN1330 Datasheet, PDF (15/31 Pages) STMicroelectronics – Designing with the L5970D 1A high efficiency DC-DC converter | |||
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AN1330
Closing the loop
This means that even if the input voltage changes, the error amplifier does not change its
value to keep the loop in regulation, thus ensuring a better line regulation and line transient
response.
To sum up the Open Loop Gain can be written as:
Equation 15
G(s)
=
GPWM(s)
â¢
-------R-----2--------
R1 + R2
â¢
AO(s)
â¢
ALC(s)
Example:
Considering RC = 2.7 kâ¦, CC = 22 nF and CP = 220 pF, the poles and zeroes of A0 are:
FP1 = 9 Hz
FP2 = 256 kHz
FZ1 = 2.68 kHz
If L = 22 µH, COUT = 100 µF and ESR = 80 mâ¦, the poles and zeroes of ALC become:
FPLC = 3.39 kHz
F0 = 19.89 kHz
Finally R1 = 5.6 k⦠and R2 = 3.3 kâ¦.
The gain and phase bode diagrams are plotted respectively in Figure 11 and Figure 12.
Figure 11. Module plot
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