STM32L083X8 Datasheet, PDF (14/139 Pages) STMicroelectronics – Ultra-low-power 32-bit MCU ARM-based Cortex-M0+, up to 192KB Flash, 20KB SRAM, 6KB EEPROM, LCD, USB, ADC, DACs, AES

Functional overview
STM32L083xx
3
Functional overview
3.1
Low-power modes
The ultra-low-power STM32L083xx support dynamic voltage scaling to optimize its power
consumption in Run mode. The voltage from the internal low-drop regulator that supplies
the logic can be adjusted according to the system’s maximum operating frequency and the
external voltage supply.
There are three power consumption ranges:
 Range 1 (V_DD range limited to 1.71-3.6 V), with the CPU running at up to 32 MHz
 Range 2 (full V_DD range), with a maximum CPU frequency of 16 MHz
 Range 3 (full V_DD range), with a maximum CPU frequency limited to 4.2 MHz
Seven low-power modes are provided to achieve the best compromise between low-power
consumption, short startup time and available wakeup sources:
 Sleep mode
In Sleep mode, only the CPU is stopped. All peripherals continue to operate and can
wake up the CPU when an interrupt/event occurs. Sleep mode power consumption at
16 MHz is about 1 mA with all peripherals off.
 Low-power run mode
This mode is achieved with the multispeed internal (MSI) RC oscillator set to the low-
speed clock (max 131 kHz), execution from SRAM or Flash memory, and internal
regulator in low-power mode to minimize the regulator's operating current. In Low-
power run mode, the clock frequency and the number of enabled peripherals are both
limited.
 Low-power sleep mode
This mode is achieved by entering Sleep mode with the internal voltage regulator in
low-power mode to minimize the regulator’s operating current. In Low-power sleep
mode, both the clock frequency and the number of enabled peripherals are limited; a
typical example would be to have a timer running at 32 kHz.
When wakeup is triggered by an event or an interrupt, the system reverts to the Run
mode with the regulator on.
Stop mode with RTC
The Stop mode achieves the lowest power consumption while retaining the RAM and
register contents and real time clock. All clocks in the V_CORE domain are stopped, the
PLL, MSI RC, HSE crystal and HSI RC oscillators are disabled. The LSE or LSI is still
running. The voltage regulator is in the low-power mode.
Some peripherals featuring wakeup capability can enable the HSI RC during Stop
mode to detect their wakeup condition.
The device can be woken up from Stop mode by any of the EXTI line, in 3.5 µs, the
processor can serve the interrupt or resume the code. The EXTI line source can be any
GPIO. It can be the PVD output, the comparator 1 event or comparator 2 event
(if internal reference voltage is on), it can be the RTC alarm/tamper/timestamp/wakeup
events, the USB/USART/I2C/LPUART/LPTIMER wakeup events.
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DocID027070 Rev 3