STC3105IQT Datasheet, PDF (14/23 Pages) STMicroelectronics – Battery monitor IC with alarm output for gas gauge applications

I²C interface
7
I²C interface
STC3105
7.1
Table 7.
b7
1
Read and write operations
The interface is used to control and read the current accumulator and registers. It is
compatible with the Philips I²C registered trademark (version 2.1). It is a slave serial
interface with a serial data line (SDA) and a serial clock line (SCL).
● SCL: input clock used to shift data
● SDA: input/output bidirectional data transfers
A filter rejects the potential spikes on the bus data line to preserve data integrity.
The bidirectional data line supports transfers up to 400 kbit/s (fast mode). The data is shifted
to and from the chip on the SDA line, MSB first.
The first bit must be high (START) followed by the 7-bit device address and the read/write
control bit. Bits DevADDR0 to DevADDR2 are factory-programmable, the default device
address value being 1110 000 (AddrID0 = AddrID1 = AddrID2 = 0). The STC3105 then
sends an acknowledge at the end of an 8-bit long sequence. The next 8 bits correspond to
the register address followed by another acknowledge.
The data field is the last 8-bit long sequence sent, followed by a last acknowledge.
Device address format
b6
b5
1
1
b4
b3
b2
b1
b0
0
DevADDR2 DevADDR1 DevADDR0
R/W
Table 8. Register address format
b7
b6
b5
b4
b3
b2
b1
b0
RegADDR7 RegADDR6 RegADDR5 RegADDR4 RegADDR3 RegADDR2 RegADDR1 RegADDR0
Table 9.
b7
DATA7
Register data format
b6
b5
DATA6
DATA5
b4
DATA4
b3
DATA3
b2
DATA2
b1
DATA1
b0
DATA0
14/23
Doc ID 022198 Rev 1