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M41T94_09 Datasheet, PDF (14/41 Pages) STMicroelectronics – Serial real-time clock with 44 bytes NVRAM and reset
Operation
M41T94
Figure 8. Output timing requirements
E
SCL
SDO
tCLQV
tCLQX
MSB OUT
ADDR. LSB IN
SDI
tCH
tCL
tQLQH
tQHQL
LSB OUT
tEHQZ
AI04634
Table 3. AC characteristics
Symbol
Parameter(1)
Min
Max
fSCL
tCH(2)
tCHCL(3)
Serial clock input frequency
Clock high
Clock transition (fall time)
DC
2
200
1
tCHDX
Serial clock input high to input data transition
50
tCHEH
tCL(2)
tCLCH(3)
Serial clock input high to chip enable high
Clock low
Clock transition (rise time)
200
200
1
tCLQV
Serial clock input low to output valid
150
tCLQX
tDHDL(3)
tDLDH(3)
Serial clock input low to output data transition
Input data transition (fall time)
Input data transition (rise time)
0
1
1
tDVCH
Input data to serial clock input high
40
tEHCH
Chip enable high to serial clock input high
200
tEHEL
tEHQZ(3)
Chip enable high to chip enable low
Chip enable high to output high-z
200
250
tELCH
tQHQL(3)
tQLQH(3)
Chip enable low to serial clock input high
Output data transition (fall time)
Output data transition (rise time)
200
100
100
1. Valid for ambient operating temperature: TA = –40 to 85°C; VCC = 2.7 to 5.5 V (except where noted).
2. tCH + tCL ≥ 1/fSCL
3. Value guaranteed by design, not 100% tested in production.
Unit
MHz
ns
µs
ns
ns
ns
µs
ns
ns
µs
µs
ns
ns
ns
ns
ns
ns
ns
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