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M41T81 Datasheet, PDF (14/28 Pages) STMicroelectronics – Serial Access Real-Time Clock with Alarms
M41T81
Data Retention Mode
With valid VCC applied, the M41T81 can be ac-
cessed as described above with READ or WRITE
Cycles. Should the supply voltage decay, the pow-
er input will be switched from the VCC pin to the
battery when VCC falls below the Battery Back-up
Switchover Voltage (VSO). At this time the clock
registers will be maintained by the attached bat-
tery supply. As VCC continues to fall, the M41T81
will pass through the Register Bit Reset Voltage
(VRST) threshold, not only write protecting itself,
but also resetting certain Control Bits (see Table
13, page 21). On power-up, when VCC returns to a
nominal value, write protection continues for tREC.
For a further, more detailed review of lifetime cal-
culations, please see Application Note AN1012.
Figure 17. Power Down/Up Mode AC Waveforms
VCC
VSO
tPD
SDA
SCL
DON'T CARE
tREC
AI00596
Table 8. Power Down/Up AC Characteristics
Symbol
Parameter(1,2)
Min
Typ
tPD
SCL and SDA at VIH before Power Down
0
tREC
SCL and SDA at VIH after Power Up
10
Note: 1. VCC fall time should not exceed 5mV/µs.
2. Valid for Ambient Operating Temperature: TA = –40 to 85°C; VCC = 2.0 to 5.5V (except where noted).
Max
Unit
nS
µS
Table 9. Power Down/Up Trip Points DC Characteristics
Sym
Parameter(1,2)
Min
Typ
Max
VSO Battery Back-up Switchover Voltage
VBAT – 0.80 VBAT – 0.50 VBAT – 0.30
VRST Register Bit Reset Voltage
1.1
2.0
Note: 1. All voltages referenced to VSS.
2. Valid for Ambient Operating Temperature: TA = –40 to 85°C; VCC = 2.0 to 5.5V (except where noted).
Unit
V
V
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