AN2014 Datasheet, PDF (14/65 Pages) STMicroelectronics – How a designer can make the most of STMicroelectronics serial EEPROMs

EEPROM cell and memory array architecture
AN2014
1.2.2
Decoding architecture
To address a single byte in a full array, decoding circuits are necessary. One logical address
is associated with one byte location. The address bits are inserted serially into a Shift
Register. Then, with parallel output, the decoding structures receive all of the bits at the
same time, to perform the decoding and addressing. The row decoder decodes and brings
correct biasing to a single row line. As one or more bytes of the same row can be
programmed at the same time, the column decoder decodes one or more column(s), and a
RAM buffer memorizes the data to write, and enables the right path for Cg-line and Bit-line
biasing.
Figure 11. Decoding block diagram
Serial Input
MSB Address Bits
Address Shift Register
LSB Address Bits
Read/Write Analog
Voltages
Column
Decoder
Bit-line and Cg-line Latches: RAM Buffer
Cg-lines and Bit-lines
1.2.3
Row
Decoder
Array
Row-lines
AI10225
Intrinsic electrical stress induced by programming
Whatever the data value to be programmed and whether the request is made by byte or
page, all high-voltage circuits^(a) are stressed by HiV (a high voltage ranging between 15 and
18V). In particular, the internal nodes of the charge pump can see voltages equal to
HiV + V_CC (that is as much as 23 V). All circuits that receive and carry HiV (ramp generator,
regulation, decoding, latches) are submitted to higher stress than active low voltage
transistors. The overall time during which the high voltage circuits are active is relatively
short compared to the product lifetime (10ms x 1Mcycles = 10000 seconds => less than 3
hours).
A standard ST EEPROM device includes a few hundred high voltage transistors, for low
memory density products (1Kbit). This number can rise to a few thousand for high memory
density products (1Mbit).
14/65
a. The high voltage is required to Erase and program an EEPROM cell.
DocID10701 Rev 10