STM32F405XX Datasheet, PDF (136/167 Pages) STMicroelectronics – USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera

Electrical characteristics
STM32F405xx, STM32F407xx
PC Card/CompactFlash controller waveforms and timings
Figure 60 through Figure 65 represent synchronous waveforms, and Table 79 and Table 80
provide the corresponding timings. The results shown in this table are obtained with the
following FSMC configuration:
● COM.FSMC_SetupTime = 0x04;
● COM.FSMC_WaitSetupTime = 0x07;
● COM.FSMC_HoldSetupTime = 0x04;
● COM.FSMC_HiZSetupTime = 0x00;
● ATT.FSMC_SetupTime = 0x04;
● ATT.FSMC_WaitSetupTime = 0x07;
● ATT.FSMC_HoldSetupTime = 0x04;
● ATT.FSMC_HiZSetupTime = 0x00;
● IO.FSMC_SetupTime = 0x04;
● IO.FSMC_WaitSetupTime = 0x07;
● IO.FSMC_HoldSetupTime = 0x04;
● IO.FSMC_HiZSetupTime = 0x00;
● TCLRSetupTime = 0;
● TARSetupTime = 0.
In all timing tables, the T_HCLK is the HCLK clock period.
Figure 60. PC Card/CompactFlash controller waveforms for common memory read
access
FSMC_NCE4_2⁽¹⁾
FSMC_NCE4_1
FSMC_A[10:0]
FSMC_NREG
FSMC_NIOWR
FSMC_NIORD
tv(NCEx-A)
td(NREG-NCEx)
td(NIORD-NCEx)
th(NCEx-AI)
th(NCEx-NREG)
th(NCEx-NIORD)
th(NCEx-NIOWR)
FSMC_NWE
td(NCE4_1-NOE)
FSMC_NOE
FSMC_D[15:0]
tw(NOE)
tsu(D-NOE)
1. FSMC_NCE4_2 remains high (inactive during 8-bit access.
th(NOE-D)
ai14895b
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Doc ID 022152 Rev 2