TDA7561 Datasheet, PDF (13/19 Pages) STMicroelectronics – MULTIFUNCTION QUAD POWER AMPLIFIER WITH BUILT-IN DIAGNOSTICS FEATURES

TDA7561
Acknowledge
The transmitter* puts a resistive HIGH level on the SDA line during the acknowledge clock pulse (see fig. 21).
The receiver** the acknowledges has to pull-down (LOW) the SDA line during the acknowledge clock pulse, so
that the SDAline is stable LOW during this clock pulse.
* Transmitter
= master (µP) when it writes an address to the TDA7561
= slave (TDA7561) when the µP reads a data byte from TDA7561
** Receiver
= slave (TDA7561) when the µP writes an address to the TDA7561
= master (µP) when it reads a data byte from TDA7561
Figure 19. Data Validity on the I²CBUS
SDA
SCL
DATA LINE
STABLE, DATA
VALID
CHANGE
DATA
ALLOWED
D99AU1031
Figure 20. Timing Diagram on the I²CBUS
SCL
SDA
START
D99AU1032
Figure 21. Acknowledge on the I²CBUS
SCL
1
2
3
7
I²CBUS
STOP
8
9
SDA
START
MSB
D99AU1033
ACKNOWLEDGMENT
FROM RECEIVER
13/19