STRFNFCA Datasheet, PDF (13/74 Pages) STMicroelectronics – Near field communication transceiver

STRFNFCA
Communication protocols
Table 5. Interpretation of flags
Bit
Meaning (Application point of view)
[7:4]
Not significant
3
Data can be read from the STRFNFCA when set.
2
Data can be sent to the STRFNFCA when set.
[1:0]
Not significant
Figure 10. Reading data from STRFNFCA
MOSI _{0 0 0 0 0 0 1 0 X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X}
MISO
Control Byte
X X X X X X X X Resp Code
LEN
DATA
DATA
Several data bytes
Data must be sampled at the rising edge of the SCK signal.
‘Sending’, ‘Polling’ and ‘Reading’ commands must be separated by a high level of the
SPI_SS line. For example, when the application needs to wait for data from the STRFNFCA,
it asserts the SPI_SS line low and issues a ‘Polling’ command. Keeping the SPI_SS line low,
the Host can read the Flags Waiting bit which indicates that the STRFNFCA can be read.
Then, the application has to assert the SPI_SS line high to finish the polling command. The
Host asserts the SPI_SS line low and issues a ‘Reading’ command to read data. When all
data is read, the application asserts the SPI_SS line high.
The application is not obliged to keep reading Flags using the Polling command until the
STRFNFCA is ready in one command. It can issue as many 'Polling' commands as
necessary. For example, the application asserts SPI_SS low, issues 'Polling' commands and
reads Flags. If the STRFNFCA is not ready, the application can assert SPI_SS high and
continue its algorithm (measuring temperature, communication with something else). Then,
the application can assert SPI_SS low again and again issue 'Polling' commands, and so
on, as many times as necessary, until the STRFNFCA is ready.
Note that at the beginning of communication, the application does not need to check flags to
start transmission. The STRFNFCA is assumed to be ready to receive a command from the
application.
Figure 11. Reset the STRFNFCA
MOSI _{0 0 0 0 0 0 0 1}
MISO
Control Byte 01
XXXXXXXX
Caution:
To reset the STRFNFCA using the SPI, the application sends the SPI Reset command
(Control Byte 01, see Figure 11) which starts the internal controller reset process and puts
the STRFNFCA into Power-up state. The STRFNFCA will wake up when pin IRQ_IN goes
low. The STRFNFCA reset process only starts when the SPI_SS pin returns to high level.
SPI communication is MSB first.
Doc ID 023077 Rev 10
13/74