STN8811A12 Datasheet, PDF (13/18 Pages) STMicroelectronics – Mobile multimedia application processor

Architecture overview
STn8811A12
2.20
Master display interface (MDIF)
This interface drives LCD display modules, that is, panels that include their own display
memory and perform LCD panel refresh themselves. The MDIF is a parallel bidirectional
interface that can send commands or data to or read data from the display panel logic. It has
a DMA engine to automatically fetch data/commands from main memory without CPU
intervention.
2.21
Pulse width light modulator (PWL)
The PWL provides control of LCD backlighting. It produces a series of pulses that are fed to
the backlighting, where the width (or duty cycle) of the pulses determines the perceived
lighting level. An 8-bit random sequence generator decreases the spectral power at the
modulator harmonic frequencies.
2.22
General purpose inputs/outputs (GPIOs)
The STn8811A12 provides 96 programmable inputs or outputs that have switchable pull-up
and pull-down resistors and are controllable in two modes:
● Software mode through an APB bus interface
● Hardware mode through a hardware control interface
The GPIO interface provides the following individually programmable functions:
● Any number of pins may be configured as interrupt sources
● Debouncing logic can be enabled for each GPIO to filter out glitches on I/Os
● Any GPIO may be used to wake up the device from sleep mode independent of
interrupt programming, and the input level that triggers wake-up is definable for each
enabled GPIO.
2.23
MultiMediaCard/secure data card interface (MMC/SD)
This interface can directly control one SD card (without encryption/decryption logic) or one
MultiMediaCard. It also supports several of each card type using the GPIOs for card
selection.
2.24
USB On-The-Go interface
The STn8811A12 USB interface is USB 2.0 compliant, with On-The-Go standard extension
(rev 1.0) compliance. The USB-OTG features:
● Supports full-speed (12 Mbit/s) and low-speed (1.5 Mbit/s) signaling bit rate
● Supports session request protocol (SRP) and host negotiation protocol (HNP)
● 7 bidirectional endpoints plus control endpoint 0
● Digital interface to external PHY
● Fully compatible with STw4810 power manager companion chip
12/17