M45PE10 Datasheet, PDF (13/34 Pages) STMicroelectronics – 1 Mbit, Low Voltage, Page-Erasable Serial Flash Memory With Byte-Alterability and a 25 MHz SPI Bus Interface

M45PE10
Read Status Register (RDSR)
The Read Status Register (RDSR) instruction al-
lows the Status Register to be read. The Status
Register may be read at any time, even while a
Program, Erase or Write cycle is in progress.
When one of these cycles is in progress, it is rec-
ommended to check the Write In Progress (WIP)
bit before sending a new instruction to the device.
It is also possible to read the Status Register con-
tinuously, as shown in Figure 10.
The status bits of the Status Register are as fol-
lows:
WIP bit. The Write In Progress (WIP) bit indicates
whether the memory is busy with a Write, Program
or Erase cycle. When set to 1, such a cycle is in
progress, when reset to 0 no such cycle is in
progress.
WEL bit. The Write Enable Latch (WEL) bit indi-
cates the status of the internal Write Enable Latch.
When set to 1 the internal Write Enable Latch is
set, when set to 0 the internal Write Enable Latch
is reset and no Write, Program or Erase instruction
is accepted.
Figure 10. Read Status Register (RDSR) Instruction Sequence and Data-Out Sequence
S
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
C
Instruction
D
Status Register Out
Status Register Out
High Impedance
Q
76543210765432107
MSB
MSB
AI02031E
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