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L6986 Datasheet, PDF (13/68 Pages) STMicroelectronics – 38 V, 2 A synchronous step-down switching regulator with 30 A quiescent current
L6986
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Functional description
Functional description
The L6986 device is based on a “peak current mode”, constant frequency control. As
a consequence, the intersection between the error amplifier output and the sensed inductor
current generates the PWM control signal to drive the power switch.
The device features LNM (low noise mode) that is forced PWM control, or LCM (low
consumption mode) to increase the efficiency at light load.
The main internal blocks shown in the block diagram in Figure 3 are:
 Embedded power elements. Thanks to the P-channel MOSFET as high-side switch the
device features low dropout operation
 A fully integrated sawtooth oscillator with adjustable frequency
 A transconductance error amplifier
 The high-side current sense amplifier to sense the inductor current
 A “Pulse Width Modulator” (PWM) comparator and the driving circuitry of the
embedded power elements
 The soft-start blocks to ramp the error amplifier reference voltage and so decreases the
inrush current at power-up. The SS/INH pin inhibits the device when driven low.
 The switchover capability of the internal regulator to supply a portion of the quiescent
current when the VBIAS pin is connected to an external output voltage
 The synchronization circuitry to manage master / slave operation and the
synchronization to an external clock
 The current limitation circuit to implement the constant current protection, sensing
pulse by pulse high-side / low-side switch current. In case of heavy short-circuit the
current protection is fold back to decrease the stress of the external components
 A circuit to implement the thermal protection function
 The OVP circuitry to discharge the output capacitor in case of overvoltage event
 MLF pin strapping sets the LNM/LCM mode and the thresholds of the RST comparator
 FSW pinstrapping sets the switching frequency
 The RST open collector output
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