TDA7420 Datasheet, PDF (12/29 Pages) STMicroelectronics – MULTIFUNCTIONAUDIO PROCESSOR

TDA7420
Figure 3: Behaviour of the Field Strength Controlled Threshold Adjustment
VPEAK
3G
MONO
STEREO
TRIG. THRESHOLD
NOISE
2.4V(11)
1.9V(10)
1.3V(01)
ATC_SB OFF (00)
0.9V
noisy signal
good signal
E’
D94AU187B
Figure 4: Behaviour of the Deviation Dependent Threshold Adjust (Over Deviation Detector)
VPEAK
(V)
2.8
2.0
1.2
0.9
OVM=11
OVM=10
OVM=01
DETECTOR OFF (00)
D94AU188
20 32.5
45
I²C BUS INTERFACE
Interface Protocol
The interface protocol comprises:
A start condition (s)
A chip address byte, (the LSB bit determines
read/write transmission).
75
DEVIATION(KHz)
A subaddress byte
A sequence of data (N-bytes + acknowledge)
A stop condition (P)
CHIP ADDRESS
SUB ADDRESS
DATA 1...DATA n
MSB
LSB
MSB
LSB
MSB
S 1 0 0 0 1 0 0 R/W ACK X X T I A₃ A₂ A₁ A₀ ACK
DATA
ACK = Acknowledge
S = Start
P = Stop
I = Autoincrement
MAX CLOCK SPEED 500kbits/s
Autoincrement
If bit I in the subaddress byte is set to ”1”, the autoincrement of subaddress is enabled.
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LSB
ACK P