STLC2415 Datasheet, PDF (12/22 Pages) STMicroelectronics – BLUETOOTH BASEBAND WITH INTEGRATED FLASH

STLC2415
Figure 4. Block Addresses
M28R400CT
Top Boot Block Addresses
3FFFF
3F000
4 KWords
38FFF
38000
37FFF
30000
4 KWords
32 KWords
Total of 8
4 KWord Blocks
0FFFF
08000
07FFF
00000
32 KWords
32 KWords
Total of 7
32 KWord Blocks
5.3.1 Flash Signal Descriptions
– Write Protect (nwp)
Write protect is an input that gives an additional hardware protection for each block. When Write Protect
is ≤ 0.4V the Lock-Down is enabled and the protection status of the flash blocks cannot be changed.
When Write Protect is ≥ (vddq - 0.4V), the Lock-Down is disabled and the flash memory blocks can be
locked or unlocked.
– Reset (nrp)
The Reset input provides a hardware reset of the memory. When reset is ≤ 0.4V, the memory is in reset
mode: the outputs are high impedant and the current consumption is minimized. After Reset all blocks
are in Locked state. When Reset is ≥ (vddq - 0.4V), the device is in normal operation. Exiting reset mode
the device enters read array mode, but a negative transition of Chip Enable or a change of the address
is required to ensure valid data outputs.
– Vdd Supply Voltage (vddf)
Vdd provides the power supply to the internal core of the flash memory device. It is the main power sup-
ply for all operations (Read, Program and Erase)
– Vddq Supply Voltage (vddq)
Vddq provides the power supply to the I/O pins and enables all Outputs to be powered independently
from Vddf. Vddq can be tied to Vddf or can use separate supply.
12/22