M68AW256M Datasheet, PDF (12/23 Pages) STMicroelectronics – 4 Mbit (256K x16) 3.0V Asynchronous SRAM

M68AW256M
Figure 9. Chip Enable or Output Enable Controlled, Read Mode AC Waveforms.
A0-A17
E
G
DQ0-DQ15
UB, LB
tAVQV
tELQV
tAVAV
VALID
tELQX
tGLQV
tGLQX
tBLQV
tBLQX
tAXQX
tEHQZ
tGHQZ
VALID
tBHQZ
AI03957c
Note: Write Enable (W) = High.
Figure 10. Chip Enable or UB/LB Controlled, Standby Mode AC Waveforms
E, UB, LB
ICC
ISB
tPU
50%
tPD
AI03856
12/23