AN3147 Datasheet, PDF (12/25 Pages) STMicroelectronics – Power management in STM8L and STM8AL

Run and low power modes
4
Run and low power modes
AN3147
By default, after a reset, the microcontroller is in Run mode. The default CPU clock is 2 MHz
(HSI / 8). Several low power modes are available to save power when the CPU is not used
for a standard operation (for instance: waiting for an external event). It is up to the user to
select the mode that gives the best compromise between low power consumption, short
startup time, good peripheral functionality, and availability of wakeup sources. Those power
modes are listed in Section 4.2.1 and Section 4.2.2.
Power consumption in Run and Wait modes can also be reduced by one of the following
means:
 Slowing down the system clocks
 Executing code from RAM
 Gating the clocks to the peripherals when they are not used.
4.1
Flash memory
On STM8L and STM8AL devices, the Flash memory supports a low power mode called
I_DDQ. In this mode, the Flash is switched off. It enters power-down mode (I_DDQ)
automatically when Halt, Active-halt, Low power wait or Low power run mode is entered.
By enabling the EEPM bit (available on STM8L05xxx, STM8L15xxx, STM8L162xx,
STM8AL31xx and STM8AL3Lxx devices only) in the FLASH_CR1 register, the Flash
program memory automatically enters I_DDQ mode when the code is executed from RAM or
when the device is in Wait mode. When the Flash program memory is in I_DDQ mode, the
recovery / wakeup time is longer (up to 2.8 μs) and depends on the supply voltage and
temperature.
4.2
Overview of low power modes
The following table lists the STM8L and STM8AL low power modes and shows a basic
behavior of STM8L and STM8AL devices and the influence of different low power modes on
CPU, peripherals and consumption.
A detailed description of each mode is given in the following chapters.
In all low power modes, the general purpose I/Os continue to drive actively outputs (both
digital and analog - DAC).
The MCU can be woken up from these low power modes by specific interrupts, including
through comparators and incoming communications on SPI, I2C and/or USART. Refer to
the interrupt mapping table in the device datasheet.
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