AN1076 Datasheet, PDF (12/15 Pages) STMicroelectronics – ST9 EXTERNAL MEMORY INTERFACE CONFIGURATION

ST9 EXTERNAL MEMORY INTERFACE CONFIGURATION
EXTERNAL BUS TIMING TABLE (MC = 1, BSZ = 1)(Measured on F250)
(V_DD = 5V ± 10%, T_A = -40°C to +125°C, Cload = 50pF)
N°
Symbol
Parameter
1 TsA (ALE)
2 ThALE (A)
3 TwALE
4 TdAz (OEN)
5 TdOEN(Az)
6 TwOEN
7 TwWEN
8 TdOEN (DR)
9 ThDR (OEN)
10 ThOEN(A)
11 ThWEN(A)
12 TvA(OEN)
13 TvA(WEN)
14 TsD (WEN)
15 ThWEN(DW)
16 TdALE (WEN)
17 TdALE (OEN)
Address Set-up Time before ALE ↓
Address Hold Time after ALE ↓
ALE High Pulse Width
Address Float (P0) to OEN ↓
P0 driven after OEN ↑
OEN Low Pulse Width
WEN Low Pulse Width
OEN ↓ to Data Valid Delay
Data hold time after OEN ↑
Address (A21:A8) hold time after OEN ↑
Address (A21:A8) hold time after WEN ↑
Address (A21:A0) valid to OEN ↑
Address (A21:A0) valid to WEN ↑
Data Set-up time before WEN ↑
Data Hold Time after WEN↑
ALE ↑ to WEN ↑ Delay
ALE ↑ to OEN ↑ Delay
Value (Note)
Unit
Formula
Min.
Tck*Wa+TckH - 28
180
ns
TckL - 15
26
ns
Tck*Wa+TckH - 24
184
ns
0
0
ns
TckL - 22
20
ns
Tck*Wd+TckH - 24
184
ns
Tck*Wd+TckH - 16
192
ns
Tck*Wd+TckH - 36
172 ns
0
0
ns
0
0
ns
0
0
ns
Tck (Wd+Wa+1.5) - 48
410
ns
Tck (Wd+Wa+1.5) - 42
416
ns
Tck*Wd+TckH - 68
140
ns
TckL - 15
26
ns
Tck (Wd+Wa+1.5) - 34
424
ns
Tck (Wd+Wa+1.5) - 42
416
ns
Note: The timing diagram remains the same for BSZ = 1. We don’t have these measurements
for MC= 0 because we want to promote MC = 1 mode in order to conform with industry
standard.
3.1 MAKING YOUR OWN MEASUREMENTS
Most of these parameters are easy to measure just by writing small programs for writing or
reading to/from the memory. Except for the Data valid to /OEN falling parameter which re-
quires capturing the instant data seen by the microcontroller during a read cycle. To measure
this, a pulse generator is required which can output a pulse with a configurable delay from a
given signal (ALE in this case.) This pulse is used to trigger one of the P0 port pins and data
on port0 is dumped to port4 continuously. So by monitoring port4 and adjusting the delay to
get a ‘1’ at port4, keeping the pulse as narrow as possible the actual moment at which data be-
comes valid for the microcontroller with respect to ALE going low can be captured.
All the measurements for MC=1 have been made between 80% transition of first edge and
20% transition of the second so as to get the minimum values for the measured parameter
By looking at the parameter values for BSZ = 0. It can be concluded that its necessary to add
1 or 2 wait states while operating at high frequencies such as 12MHz otherwise the value of
some of the parameters becomes negative.
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