English
Language : 

STM32F207VCT6 Datasheet, PDF (116/177 Pages) STMicroelectronics – ARM-based 32-bit MCU, 150DMIPs, up to 1 MB Flash/128+4KB RAM, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera
Electrical characteristics
STM32F20xxx
Table 64. ADC characteristics (continued)
Symbol
Parameter
Conditions
Min
Typ Max Unit
12-bit resolution
-
Single ADC
Sampling rate
fS(3)
(fADC = 30 MHz)
12-bit resolution
Interleave Dual ADC
-
mode
12-bit resolution
Interleave Triple ADC
-
mode
fADC = 30 MHz
3 sampling time
-
IVREF+(3)
ADC VREF DC current
consumption in conversion mode
12-bit resolution
fADC = 30 MHz
480 sampling time
-
12-bit resolution
fADC = 30 MHz
3 sampling time
-
IVDDA(3)
ADC VDDA DC current
consumption in conversion mode
12-bit resolution
fADC = 30 MHz
480 sampling time
-
12-bit resolution
-
2
Msps
-
3.75 Msps
-
6
Msps
300
500
µA
-
16
µA
1.6
1.8
mA
-
60
µA
1. If IRROFF is set to VDD, this value can be lowered to 1.7 V when the device operates in the 0 to 70 °C temperature range.
2. It is recommended to maintain the voltage difference between VREF+ and VDDA below 1.8 V.
3. Based on characterization, not tested in production.
4. VREF+ is internally connected to VDDA and VREF- is internally connected to VSSA.
5. RADC maximum value is given for VDD=1.8 V, and minimum value for VDD=3.3 V.
6. For external triggers, a delay of 1/fPCLK2 must be added to the latency specified in Table 64.
Equation 1: RAIN max formula
RAIN
=
-------------------(--k------–-----0----.--5-----)-------------------
fADC × CADC × ln (2N + 2)
–
RADC
The formula above (Equation 1) is used to determine the maximum external impedance
allowed for an error below 1/4 of LSB. N = 12 (from 12-bit resolution) and k is the number of
sampling periods defined in the ADC_SMPR1 register.
116/177
Doc ID 15818 Rev 9