STM32F103RET6 Datasheet, PDF (11/130 Pages) STMicroelectronics – 256 to 512 Kbytes of Flash memory

STM32F103xC, STM32F103xD, STM32F103xE
Description
2.1
Device overview
The STM32F103xx high-density performance line family offers devices in six different
package types: from 64 pins to 144 pins. Depending on the device chosen, different sets of
peripherals are included, the description below gives an overview of the complete range of
peripherals proposed in this family.
Figure 1 shows the general block diagram of the device family.
Table 2.
STM32F103xC, STM32F103xD and STM32F103xE features and peripheral
counts
Peripherals
STM32F103Rx
STM32F103Vx
STM32F103Zx
Flash memory in Kbytes
SRAM in Kbytes
FSMC
256
384 512 256 384 512 256 384 512
48
64⁽¹⁾
48
64
48
64
No
Yes⁽²⁾
Yes
General-purpose
4
Timers Advanced-control
2
Basic
2
SPI(I²S)⁽³⁾
3(2)
I²C
2
USART
5
Comm
USB
1
CAN
1
SDIO
GPIOs
51
12-bit ADC
3
Number of channels
16
1
80
112
3
3
16
21
12-bit DAC
2
Number of channels
2
CPU frequency
Operating voltage
Operating temperatures
72 MHz
2.0 to 3.6 V
Ambient temperatures: –40 to +85 °C /–40 to +105 °C (see Table 10)
Junction temperature: –40 to + 125 °C (see Table 10)
Package
LQFP64, WLCSP64 LQFP100, BGA100 LQFP144, BGA144
1. 64 KB RAM for 256 KB Flash are available on devices delivered in CSP packages only.
2. For the LQFP100 and BGA100 packages, only FSMC Bank1 and Bank2 are available. Bank1 can only
support a multiplexed NOR/PSRAM memory using the NE1 Chip Select. Bank2 can only support a 16- or
8-bit NAND Flash memory using the NCE2 Chip Select. The interrupt line cannot be used since Port G is
not available in this package.
3. The SPI2 and SPI3 interfaces give the flexibility to work in an exclusive way in either the SPI mode or the
I²S audio mode.
Doc ID 14611 Rev 8
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