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M48T254V Datasheet, PDF (11/24 Pages) STMicroelectronics – CLOCK FUNCTION IS TRANSPARENT TO RAM OPERATION. | |||
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Figure 10. Memory WRITE Cycle, Chip Enable Controlled
ADDRESSES
CE
tWC
tAW
tWP
tAH2
tOEW
WE
tODW
tCOE
M48T254V
DQ0âDQ7
tDS
tDH2
DATA IN
STABLE
AI05656
Note: 1. OE = VIH or VIL. If OE = VIH during a WRITE cycle, the output buffers remain in a high impedance state.
2. If WE is low or the WE low transition occurs prior to or simultaneously with the CE low transition, the output buffers remain in a high
impedance state during this period.
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