M45PE10-07 Datasheet, PDF (11/45 Pages) STMicroelectronics – 1 Mbit, low voltage, Page-Erasable Serial Flash memory with byte-alterability and a 50 MHz SPI bus interface

M45PE10
SPI modes
The typical value of R is 100 kΩ, assuming that the time constant R*C_p (C_p = parasitic
capacitance of the bus line) is short enough, as the S and C lines must reach the correct
state (S = High and C = Low) while the SPI bus is in high impedance.
Example: C_p = 50 pF, that is R*C_p = 5 µs <=> the application must ensure that the Bus
Master never leaves the SPI bus in the high impedance state for a time period shorter than
5 µs.
Figure 4. SPI modes supported
CPOL CPHA
0 0C
1 1C
D
MSB
Q
MSB
AI01438B
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