AN4467 Datasheet, PDF (11/33 Pages) STMicroelectronics – Getting started with STM32L0xx hardware development

AN4467
Power supplies
1.2
Power supply schemes
The circuit is powered by a stabilized power supply, V_DD.
• The V_DD pins must be connected to V_DD with external decoupling capacitors; one
single tantalum or ceramic capacitor (minimum 4.7 µF, typically 10 µF) for the package
+ one 100 nF ceramic capacitor for each V_DD pin).
• The V_DDA pin must be connected to two external decoupling capacitors (100 nF
ceramic capacitor + 1 µF tantalum or ceramic capacitor).
• The V_REF+ pin can be connected to the V_DDA external power supply. If a separate,
external reference voltage is applied on V_REF+, a 100 nF and a 1 µF capacitor must be
connected on this pin. To compensate peak consumption on Vref, the 1 µF capacitor
may be increased up to 10 µF when the sampling speed is high. When ADC or DAC is
used, V_REF+ must remain between 1.8 V and V_DDA. V_REF+ can be grounded when ADC
and DAC are not active; this enables the user to power down an external voltage
reference.
• Additional precautions can be taken to filter digital noise: V_DDA can be connected to
V_DD through a ferrite bead. In this case take care to keep a (V_DDA- V_DD) difference
lower than 300 mV.
Figure 2. Power supply scheme
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1. V_REF+ is either connected to V_DDA or to V_REF.
2. N is the number of V_DD and V_SS inputs.
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DocID026156 Rev 2
11/33
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