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STM32L151RCT6A Datasheet, PDF (108/136 Pages) STMicroelectronics – Ultra-low-power 32-bit MCU ARM-based Cortex-M3, 256KB Flash, 32KB SRAM, 8KB EEPROM, LCD, USB, ADC, DAC
Electrical characteristics
STM32L151xC STM32L152xC
Table 58. DAC characteristics (continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
dOffset/dT(1)
Offset error temperature
coefficient (code 0x800)
VDDA = 3.3V
VREF+ = 3.0V
TA = 0 to 50 °C
DAC output buffer OFF
VDDA = 3.3V
VREF+ = 3.0V
TA = 0 to 50 °C
DAC output buffer ON
Gain(1)
Gain error(7)
CL ≤ 50 pF, RL ≥ 5 kΩ
DAC output buffer ON
No RLOAD, CL ≤ 50 pF
DAC output buffer OFF
dGain/dT(1)
Gain error temperature
coefficient
VDDA = 3.3V
VREF+ = 3.0V
TA = 0 to 50 °C
DAC output buffer OFF
VDDA = 3.3V
VREF+ = 3.0V
TA = 0 to 50 °C
DAC output buffer ON
TUE(1)
Total unadjusted error
CL ≤ 50 pF, RL ≥ 5 kΩ
DAC output buffer ON
No RLOAD, CL ≤ 50 pF
DAC output buffer OFF
tSETTLING
Settling time (full scale: for
a 12-bit code transition
between the lowest and
the highest input codes till
CL ≤
50 pF, RL ≥ 5 kΩ
DAC_OUT reaches final
value ±1LSB
-20
-10
0
20
0
µV/°C
50
- +0.1 / -0.2% +0.2 / -0.5%
%
- +0 / -0.2% +0 / -0.4%
-10
-2
-40
-8
0
µV/°C
0
-
12
-
8
30
LSB
12
-
7
12
µs
Update rate
Max frequency for a
correct DAC_OUT change
(95% of final value) with 1 CL ≤ 50 pF, RL ≥ 5 kΩ
LSB variation in the input
code
tWAKEUP
Wakeup time from off
state (setting the ENx bit
in the DAC Control
register)(8)
CL ≤ 50 pF, RL ≥ 5 kΩ
-
1
Msps
-
9
15
µs
PSRR+
VDDA supply rejection ratio
(static DC measurement)
CL ≤
50 pF, RL ≥ 5 kΩ
-
-60
-35
dB
1. Data based on characterization results.
2. Connected between DAC_OUT and VSSA.
3. Difference between two consecutive codes - 1 LSB.
4. Difference between measured value at Code i and the value at Code i on a line drawn between Code 0 and last Code 4095.
5. Difference between the value measured at Code (0x800) and the ideal value = VREF+/2.
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Doc ID 022799 Rev 3