STM32F103CBU6 Datasheet, PDF (104/105 Pages) STMicroelectronics – Medium-density performance line ARM-based 32-bit MCU

Revision history
STM32F103x8, STM32F103xB
Table 61. Document revision history (continued)
Date
Revision
Changes
Replaced VQFN48 package with UQFN48 in cover page packages,
Table 2: STM32F103xx medium-density device features and peripheral
counts, Figure 9: STM32F103xx performance line UFQFPN48 pinout,
Table 2: STM32F103xx medium-density device features and peripheral
counts, Table 55: UFBGA100 - ultra fine pitch ball grid array, 7 x 7 mm,
0.50 mm pitch, package mechanical data, Table 60: Ordering
information scheme and updated Table 59: Package thermal
characteristics
Added footnote for TFBGA ADC channels in Table 2: STM32F103xx
medium-density device features and peripheral counts
Updated ‘All GPIOs are high current...’ in Section 2.3.21: GPIOs
(general-purpose inputs/outputs)
Updated Table 5: Medium-density STM32F103xx pin definitions
Corrected Sigma letter in Section 5.1.1: Minimum and maximum values
Removed the first sentence in Section 5.3.16: Communications
interfaces
Added ‘V_IN’ in Table 9: General operating conditions
Updated first sentence in Output driving current
Added note 5. in Table 24: HSI oscillator characteristics
14-May-2013
15
Updated ‘V_IL’ and ‘V_IH’ in Table 35: I/O static characteristics
Added notes to Figure 26: Standard I/O input characteristics - CMOS
port, Figure 27: Standard I/O input characteristics - TTL port, Figure 28:
5 V tolerant I/O input characteristics - CMOS port and Figure 29: 5 V
tolerant I/O input characteristics - TTL port
Updated Figure 32: I2C bus AC waveforms and measurement circuit
Updated note 2. and 3.,removed note “the device must internally...” in
Table 40: I2C characteristics
Updated title of Table 41: SCL frequency (fPCLK1= 36 MHz.,VDD_I2C =
3.3 V)
Updated note 2. in Table 49: ADC accuracy
Updated Figure 49: UFBGA100 - ultra fine pitch ball grid array, 7 x 7
mm, 0.50 mm pitch, package outline and Table 55: UFBGA100 - ultra
fine pitch ball grid array, 7 x 7 mm, 0.50 mm pitch, package mechanical
data
Updated Figure 45: LFBGA100 - 10 x 10 mm low profile fine pitch ball
grid array package outline and Table 53: LFBGA100 - 10 x 10 mm low
profile fine pitch ball grid array package mechanical data
Updated Figure 52: TFBGA64 - 8 x 8 active ball array, 5 x 5 mm, 0.5 mm
pitch, package outline and Table 57: TFBGA64 - 8 x 8 active ball array, 5
x 5 mm, 0.5 mm pitch, package mechanical data
05-Aug-2013
Updated the reference for ‘V_ESD(CDM)’ in Table 32: ESD absolute
maximum ratings
16 Corrected ‘tf(IO)out’ in Figure 30: I/O AC characteristics definition
Updated Table 52: UFQFPN48 7 x 7 mm, 0.5 mm pitch, package
mechanical data
104/105
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