PSD813F1-A Datasheet, PDF (102/120 Pages) STMicroelectronics – Flash In-System Programmable ISP Peripherals For 8-bit MCUs

PSD813F1-A
Microcontroller Interface – PSD813F1V AC/DC Parameters
(3.0 V to 3.6 V Versions)
Power Down Timing (3.0 V to 3.6 V Versions)
Symbol
Parameter
t _LVDV
ALE Access Time from
Power Down
t _CLWH
Maximum Delay from APD Enable
to Internal PDN Valid Signal
NOTE: 1. t_CLCL is the CLKIN clock period.
V_stbyon Timing (3.0 V to 3.6 V Versions)
Symbol
Parameter
t _BVBH
Vstby Detection to Vstbyon Output
High
t _BXBL
Vstby Off Detection to Vstbyon
Output Low
Conditions
Using CLKIN Input
Conditions
Preliminary
-15
-20
Min Max Min Max Unit
150
200 ns
15 _* t_CLCL (Note 1)
µs
Min
Typ
Max Unit
2.0
µs
2.0
µs
Reset Timing (3.0 V to 3.6 V Versions)
Symbol
Parameter
Conditions
t _NLNH
t _OPR
t _NLNH-PO
Warm RESET Active Low Time (Note 1)
RESET High to Operational Device
Power On Reset Active Low Time
(Note 2)
NOTE: 1. RESET will not reset Flash or EEPROM programming/erase cycles.
2. tNLNH-PO is 10 ms for devices manufactured before the rev. A.
Min
Typ
Max Unit
300
ns
300
ns
1
ms
98