TDA7430_04 Datasheet, PDF (10/23 Pages) STMicroelectronics – DIGITALLY CONTROLLED AUDIO PROCESSOR WITH SURROUND SOUND MATRIX AND VOICE CANCELLER

TDA7430 - TDA7431
Figure 8. Data validity on the I²C bus
SDA
SCL
DATA LINE
STABLE, DATA
VALID
Figure 9. Timing Diagram of I²C bus
CHANGE
DATA
ALLOWED
SCL
SDA
START
Figure 10. Acknowledge on the I²C bus
D99AU1032
SCL
1
2
3
7
D99AU1031
I²CBUS
STOP
8
9
SDA
START
MSB
D99AU1033
ACKNOWLEDGMENT
FROM RECEIVER
4 SOFTWARE SPECIFICATION
4.1 Interface Protocol
The interface protocol comprises:
■ A start condition (S)
■ A chip address byte, containing the TDA7430/TDA7431 address
■ A subaddress bytes
■ A sequence of data (N byte + achnowledge)
■ A stop condition (P)
Figure 11.
CHIP ADDRESS
SUBADDRESS
DATA 1 to DATA n
MSB
LSB
MSB
S 1 0 0 0 0 0 A 0 ACK B
D95AU226A
DATA
LSB
MSB
ACK
DATA
LSB
ACK P
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