STMPE811_09 Datasheet, PDF (10/64 Pages) STMicroelectronics – Advanced resistive touch screen controller with 8-bit GPIO expander

I2C interface
4
I²C interface
STMPE811
The addressing scheme of STMPE811 is designed to allow up to 2 devices to be connected
to the same I²C bus.
Figure 4. STMPE811 I²C interface
GND
VCC
SCLK
SDAT
SCLK
SDAT
ADDR0
STMPE811
Table 6.
I²C address
ADDR0
Address
0
0 x 82
1
0 x 88
For the bus master to communicate to the slave device, the bus master must initiate a Start
condition and be followed by the slave device address. Accompanying the slave device
address, is a read/write bit (R/W). The bit is set to 1 for read and 0 for write operation. If a
match occurs on the slave device address, the corresponding device gives an acknowledge
on the SDA during the 9^th bit time. If there is no match, it deselects itself from the bus by not
responding to the transaction.
Figure 5. I²C timing diagram
SDA
tBUF
SCL
P
tHD:STA
tR
tF
tHIGH
S
tLOW
tSU:DAT
tHD:DAT
tHD:STA
tSU:STA
SR
tSU:STO
P
AI00589
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Doc ID 14489 Rev 2