STLC3075 Datasheet, PDF (10/26 Pages) STMicroelectronics – INTEGRATED POTS INTERFACE FOR HOME ACCESS GATEWAY AND WLL

STLC3075
consumption to the fixed limit and therefore also the ring voltage level will be reduced.
In the typical application with R_SENSE = 110mΩ the peak current from Vpos is limited to about 900mA,
which correspond to an average current of 700mA max. In this condition the STLC3075 can drive up to
3REN with a ring frequency fr=25Hz (1REN = 1800Ω + 1.0µF, European standard).
In order to drive up to 5REN (1REN= 6930Ω + 8µF, US standard) it is necessary to modify the external
components as follows:
CREV = 15nF
RD = 2.2KΩ
RSENSE = 100mΩ
3.2.5 Layout Recommendation
A properly designed PCB layout is a basic issue to guarantee a correct behaviour and good noise perfor-
mances.
Particular care must be taken on the ground connection and in this case the star configuration allows sure-
ly to avoid possible problems (see Application Diagram Figg. 11,12).
The ground of the power supply (VPOS) has to be connected to the center of the star, let’s call this point
SYSTEM-GND. This point should show a resistance as low as possible, that means it should be a ground
plane.
In particular to avoid noise problems the layout should prevent any coupling between the DC/DC convert-
er components and analog pins that are referred to AGND (ex: RD, IREF, RTH, RLIM, VF). As a first rec-
comendation the components CV, L, T1, D1, CVPOS, RSENSE should be kept as close as possible to
each other and isolated from the other components.
Additional improvements can be obtained:
■ decoupling the center of the star from the analog ground of STLC3075 using small chokes.
■ adding a capacitor in the range of 100nF between VPOS and AGND in order to filter the switch
frequency on VPOS.
3.2.6 External Components List
In order to properly define the external components value the following system parameters have to be de-
fined:
■ The AC input impedance shown by the SLIC at the line terminals "Zs" to which the return loss
measurement is referred. It can be real (typ. 600Ω) or complex.
■ The AC balance impedance, it is the equivalent impedance of the line "Zl" used for evaluation of the
trans-hybrid loss performances (2/4 wire conversion). It is usually a complex impedance.
■ The value of the two protection resistors Rp in series with the line termination. The line impedance at
the TTX frequency "Zlttx".
■ The metering pulse level amplitude measured at line termination "V_LOTTX". In case of low order filtering,
V_LOTTX represents the amplitude (Vrms) of the fundamental frequency component. (typ 12 or 16KHz).
■ Pulse metering envelope rise and decay time constant "τ".
■ The slope of the ringing waveform "∆V_TR/∆_T ".
■ The value of the constant current limit current "Ilim".
■ The value of the off-hook current threshold "I_TH".
■ The value of the ring trip rectified average threshold current "I_RTH".
■ The value of the required self generated negative battery "V_BATR" in ring mode (max value is 70V). This
value can be obtained from the desired ring peak level + 5V.
■ The value of the maximum current peak drawn from Vpos "IPK".
10/26