STCL132K Datasheet, PDF (10/20 Pages) STMicroelectronics – 32,768 Hz silicon oscillator

DC and AC parameters
STCL132K
Table 4.
Symbol
DC and AC parameters
Description
Test condition
Min
Typ Max Unit
V_CC Operating voltage
STCL132KRxxx
STCL132KWxxx
1.65
1.95
V
2.7
3.6
V
I_CC
I_CC2
V_OL
V_OH
V_IL
V_IH
R_PD
Operating current
Standby current
Output voltage low
Output voltage high
Input low voltage (CE)
Input high voltage (CE)
Internal pull-down
resistor
V_CC = 1.65 to 1.95 V,
(STCL132KRxxx)
output unloaded
V_CC = 2.7 to 3.6 V,
(STCL132KWxxx)
output unloaded
CE = GND
I_OL = 2 mA
I_OH = –2 mA
60
85
µA
85 105
µA
V_CC – 0.2 V
0.65 V_CC
1
µA
0.2 V_CC
V
V
0.35 V_CC V
V
150
kΩ
V_CC = 1.65 to 1.95 V, –30 to +85 °C
(STCL132KRxxx)
–1.2
+1.2
%
Frequency accuracy⁽¹⁾
V_CC = 1.65 to 1.95 V, 0 to +70 °C
(STCL132KRxxx)
V_CC = 2.7 to 3.6 V, –30 to +85 °C
(STCL132KWxxx)
–1.0
–1.2
+1.0
%
+1.2
%
V_CC = 2.7 to 3.6 V, 0 to +70 °C
(STCL132KWxxx)
–1.0
+1.0
%
Frequency temperature
coefficient
–150
+180 ppm/°C
Jitter
Duty cycle
Cycle-to-cycle, over 20 s
150
ns_P-P
Taken at half of the signal amplitude
45
50
55
%
t_START Startup time
From the point when V_CC reached
min operating voltage or CE went
high until valid output signal occurs
on the F_OUT pin (in the meantime
output remains low)
90 120
µs
t_R, t_F Rise/fall time
C_L = 12 pF; 10 to 90 % of the
amplitude
10
ns
C_L Load capacitance
12
pF
1.
Typical
biased,
frequency shift
125 °C op-life.
due
to
aging
is
±0.2%.
Aging
stresses
include
one
solder
reflow
(260
°C
peak)
and
1000
hrs
V_CC
10/20