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M34D64-W_08 Datasheet, PDF (10/27 Pages) STMicroelectronics – 64 Kbit serial I²C bus EEPROM with hardware write control on top quarter of memory
Signal description
Figure 4. Memory map showing write control area
1FFFh
Write Controlled
Area
1800h
M34D64-W
1000h
0800h
0000h
AI03114C
Figure 5. Maximum RL value versus bus capacitance (CBUS) for an I2C bus
100
10
1
10
100
Bus line capacitor (pF)
fC = 400 kHz, tLOW = 1.3 µs
Rbus x Cbus time
constant must be less than
500 ns
VCC
Rbus
1000
I²C bus
master
SCL
SDA
M34D64
Cbus
ai15127
10/27