TS555C Datasheet, PDF (1/12 Pages) STMicroelectronics – LOW POWER SINGLE CMOS TIMERS

®
TS555C,I,M
LOW POWER SINGLE CMOS TIMERS
. _{VERY LOW POWER CONSUMPTION :}
. _{100µA typ at VCC = 5V}
. _{HIGH MAXIMUM ASTABLE FREQUENCY}
2.7MHz
. PIN-TO-PIN AND FUNCTIONALLY
COMPATIBLE WITH BIPOLAR NE555
. _{VOLTAGE RANGE : +2V to +18V}
. _{HIGH OUTPUT CURRENT CAPABILITY}
. _{SUPPLY CURRENT SPIKES REDUCED}
DURING OUTPUT TRANSITIONS
. _{HIGH INPUT IMPEDANCE : 10}¹² _Ω
. _{OUTPUT COMPATIBLE WITH TTL,CMOS}
AND LOGIC MOS
N
DIP8
(Plastic Package)
D
SO8
(Plastic Micropackage)
P
TSSO P8
(Thin Shrink Small Outline Package)
ORDER CODES
Part Number
Temperature
Range
TS555C
TS555I
TS555M
0^oC, +70^oC
-40, +125^oC
-55, +125^oC
Examples : TS555CD , TS555IN
PIN CONNECTIONS (top view)
Package
NDP
q qq
q qq
q qq
DESCRIPTION
The TS555 is a single CMOS timer which offers
very low consumption (Icc(TYP) TS555 = 100µA
Icc(TYP) NE555 = 3mA) and high frequency
(f(max.) TS555 = 2.7MHz - f(max.) NE555 = 0.1 MHz)
Thus, either in Monostable or Astable mode, timing
remains very accurate.
The TS555 provides reduced supply current spikes
during output transitions, which enables the use of
lower decoupling capacitors compared to those
required by bipolar NE555.
Timing capacitors can also be minimized due to
high input impedance (10¹² Ω).
January 1999
GND 1
Trigger 2
Output 3
Reset 4
8 V_CC
7 Discharge
6 Threshold
5
Control
Voltage
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