TN1171 Datasheet, PDF (1/26 Pages) STMicroelectronics – Description of UFDFPN5, UFDFPN8 and WFDFPN8 for STMicroelectronics EEPROMs and recommendations for use

TN1171
Technical note
Description of UFDFPN5, UFDFPN8 and WFDFPN8
for STMicroelectronics EEPROMs and recommendations for use
Introduction
This document describes the following Dual Flat No-Lead Package (DFN) 5 and 8 leads
used for STMicroelectronics EEPROM products, and provides recommendation on how to
use them:
• UFDFPN5
• UFDFPN8
• WFDFPN8
During recent years ST conducted research on next-generation Chip-Size Packaging
(CSP). The DFN is a near CSP plastic encapsulated package using conventional copper
lead frame technology. This construction benefits from being a cost effective advanced
packaging solution which helps to maximize board space with improved electrical and
thermal performance over traditional leaded packages.
Such a package is a leadless package, with low profile (less than 1.0 mm), where electrical
contact to the PCB is made by soldering the lands on the bottom surface of the package to
the PCB, instead of the conventional formed leads. The DFNs are molded in one solid array.
Individual units are singulated using a saw.
Warning:
This technical note is widely distributed and the list of
applicable products is constantly evolving. Please verify the
product under consideration does include at least one of the
packages described herein before assuming this document
applies.
November 2014
DocID026092 Rev 3
1/26
www.st.com
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