TA235 Datasheet, PDF (1/6 Pages) STMicroelectronics – TECHNICAL ARTICLE

TA 235
TECHNICAL ARTICLE
FIRMWARE HUB (FWH):
NEW GENERATION STORAGE FOR BIOS
James Lee
STMicroelectronics Inc.
Lexington, MA, USA
Sandro D’Angelo
STMicroelectronics
Catania, Italy
The traditional PC motherboard uses a chip-set
containing two controllers, called the North Bridge
and the South Bridge. Intel replaces these with the
Hub. In the Hub Architecture the two controllers
are connected to each other via a new Interlink
dedicated bus. This is a high-speed bus that has
twice the bandwidth of the PCI bus that works at
266 MBytes per second and resembles the new
point-to-point channel. The new Intel PC platforms
incorporate three primary components:
s the Memory Control Hub (MCH),
s the I/O Control Hub (ICH),
s the Firmware Hub (FWH).
They use the Intel Hub Protocol that allows a
greater flow of information from the I/O controller
to the memory controller.
What is the Firmware Hub?
The Firmware Hub (FWH) is a flash memory
device for BIOS storage, based on Intel’s Low Pin
Count (LCP) Interface Specification. It eliminates
a redundant nonvolatile memory component and
is a fundamental part of the new generation PC
motherboards. It is the key to future security and
manageability of infrastructures for the PC
platform.
Firmware Hub Functional Description
The memory of the FWH is constructed in a
uniformed matrix array of 64 KByte blocks to allow
each block to be erased and reprogrammed
without affecting other blocks. For functional
flexibility the FWH can be operated with two
different interfaces:
s the Firmware Hub Interface (FWH) for
embedded operation
s the Address/Address Multiplexed Interface (A/
A Mux) for programming operation during
manufacturing.
They are selected by the setting of the Interface
Configuration (IC) pin at V_IL for FWH Interface
mode and V_IH for A/A Mux Interface mode.
Figure 1. Firmware Hub Interface
Configuration
VCC VPP
4
ID0-ID3
5
FGPI0-
FGPI4
FWH4
CLK
IC
RP
INIT
M50FW040
4
FWH0-
FWH3
WP
TBL
VSS
AI03623
October 2000
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