STW8NA80 Datasheet, PDF (1/6 Pages) STMicroelectronics – N - CHANNEL ENHANCEMENT MODE POWER MOS TRANSISTORS

STW8NA80
®
STH8NA80FI
N - CHANNEL ENHANCEMENT MODE
POWER MOS TRANSISTORS
TYPE
STW 8NA80
S TH8NA 80F I
V _DSS
800 V
800 V
R_DS(on)
< 1.50 Ω
< 1.50 Ω
I_D
7.2 A
4.5 A
PRELIMINARY DATA
s TYPICAL RDS(on) = 1.3 Ω
s ± 30V GATE TO SOURCE VOLTAGE RATING
s 100% AVALANCHE TESTED
s REPETITIVE AVALANCHE DATA AT 100^oC
s LOW INTRINSIC CAPACITANCES
s GATE GHARGE MINIMIZED
s REDUCED THRESHOLD VOLTAGE SPREAD
DESCRIPTION
This series of POWER MOSFETS represents the
most advanced high voltage technology. The op-
timized cell layout coupled with a new proprietary
edge termination concur to give the device low
RDS(on) and gate charge, unequalled rug-
gedness and superior switching performance.
23
1
TO-247
3
2
1
ISOWATT218
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
s HIGH CURRENT, HIGH SPEED SWITCHING
s SWITCH MODE POWER SUPPLIES (SMPS)
s DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVE
ABSOLUTE MAXIMUM RATINGS
Symb ol
Parameter
V_DS Drain-source Voltage (V_GS = 0)
V_DGR Drain- gate Voltage (R_GS = 20 kΩ)
V_GS G ate-source Volt age
I_D
Drain Current (continuous) at T_c = 25 ^oC
I_D
Drain Current (continuous) at T_c = 100 ^oC
I_DM(•)
P_tot
Drain Current (pulsed)
Total Dissipation at T_c = 25 ^oC
Derating Factor
V_ISO I nsulation W ithstand Voltage (DC)
T_{s tg} Storage T emperature
T_j
Max. O perating Junct ion T emperature
(•) Pulse width limited by safe operating area
October 1998
V alu e
STW 8NA80 ST H8NA80FI
800
800
± 30
7.2
4.5
4.5
2.8
28.8
28.8
175
70
1.4
0.56

4000
-65 to 150
150
Unit
V
V
V
A
A
A
W
W/^oC
V
o_C
o_C
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