STW20NM65N Datasheet, PDF (1/18 Pages) STMicroelectronics – Low gate input resistance

STW20NM65N-STI20NM65N-STF20NM65N
STB20NM65N-STP20NM65N
N-channel 650V - 0.16Ω - 19A - TO-220/FP - D²/I²PAK - TO-247
Second generation MDmesh™ Power MOSFET
Features
Type
V_DSS
(@T_Jmax)
R_DS(on) Max
I_D
STB20NM65N 710V
< 0.19Ω
19A
STI20NM65N
710V
< 0.19Ω
19A
3
2
1
TO-220
123
I²PAK
STF20NM65N 710V
< 0.19Ω 19A⁽¹⁾
3
STP20NM65N
) ^STW20NM65N
710V
710V
< 0.19Ω
19A
< 0.19Ω
19A
t(s ^{1. Limited only by maximum temperature allowed}
c _{■ 100% avalanche tested}
du _{■ Low input capacitance and gate charge}
ro _{■ Low gate input resistance}
te ^P Application
le _{■ Switching applications}
bso _Description
- ^O _{This series of devices is designed using the}
) _{second generation of MDmesh™ Technology.}
t(s ^{This revolutionary Power MOSFET associates a}
c _{new vertical structure to the Company’s strip}
u _{layout to yield one of the world’s lowest on-}
d _{resistance and gate charge. It is therefore suitable}
ro _{for the most demanding high efficiency}
P _converters.
lete ^{Table 1. Device summary}
o_{Order codes}
bs STB20NM65N
O _STI20NM65N
Marking
20NM65N
20NM65N
3
2
1
TO-220FP
1
D²PAK
3
2
1
TO-247
Figure 1. Internal schematic diagram
Package
D²PAK
I²PAK
Packaging
Tape & reel
Tube
STF20NM65N
20NM65N
TO-220FP
Tube
STP20NM65N
20NM65N
TO-220
Tube
STW20NM65N
20NM65N
TO-247
Tube
September 2007
Rev 1
1/18
www.st.com
18