STW18NB40 Datasheet, PDF (1/7 Pages) STMicroelectronics – N-CHANNEL 400V - 0.19ohm - 18.4A TO-247/ISOWATT218 PowerMESH MOSFET

STW18NB40
STH18NB40FI
N-CHANNEL 400V - 0.19 Ω - 18.4 A TO-247/ISOWATT218
PowerMesh™ MOSFET
TYPE
V_DSS
R_DS(on)
I_D
PRELIMINARY DATA
STW18NB40
STH18NB40FI
400 V
400 V
< 0.26 Ω
< 0.26 Ω
18.4 A
12.4 A
s TYPICAL R_DS(on) = 0.19 Ω
s EXTREMELY HIGH dv/dt CAPABILITY
s 100% AVALANCHE TESTED
s VERY LOW INTRINSIC CAPACITANCES
s GATE CHARGE MINIMIZED
DESCRIPTION
Using the latest high voltage MESH OVERLAY™
process, STMicroelectronics has designed an ad-
vanced family of power MOSFETs with outstanding
performances. The new patent pending strip layout
coupled with the Company’s proprieraty edge termi-
nation structure, gives the lowest R_DS(on) per area,
exceptional avalanche and dv/dt capabilities and
unrivalled gate charge and switching characteris-
tics.
3
2
1
TO-247
3
2
1
ISOWATT218
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
s HIGH CURRENT, HIGH SPEED SWITCHING
s SWITH MODE POWER SUPPLIES (SMPS)
s DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVE
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
V_DS
Drain-source Voltage (V_GS = 0)
V_DGR
Drain-gate Voltage (R_GS = 20 kΩ)
V_GS
Gate- source Voltage
I_D
Drain Current (continuos) at T_C = 25°C
I_D
I_DM (l)
Drain Current (continuos) at T_C = 100°C
Drain Current (pulsed)
P_TOT
Total Dissipation at T_C = 25°C
Derating Factor
dv/dt (1) Peak Diode Recovery voltage slope
V_ISO
Insulation Withstand Voltage (DC)
T_stg
Storage Temperature
T_j
Max. Operating Junction Temperature
(•)Pulse width limited by safe operating area
June 2002
Value
STW18NB40 STH18NB40FI
400
400
±30
18.4
12.4
11.6
7.8
73.6
73.6
190
80
1.52
0.64
4.5
4.5
-
2000
–65 to 150
150
Unit
V
V
V
A
A
A
W
W/°C
V/ns
V
°C
°C
(1)I_SD<18.4A, di/dt<200A/µ, V_DD<V_(BR)DSS,TJ<T_JMAX
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