STV2145 Datasheet, PDF (1/17 Pages) STMicroelectronics – I2C BUS CONTROLLED EAST-WEST AND VERTICAL INTERFACE

STV2145
I²C BUS CONTROLLED EAST-WEST
AND VERTICAL INTERFACE
. INTEGRATED VERTICAL SAWTOOTH GEN-
ERATOR WITH AMPLITUDE CONTROL
LOOP (50Hz - 60Hz)
. INTERLACE MODE INTRINSICALLY CON-
TROLLED BY STV2118A
. VERTICAL SIZE CORRECTION (BREATH-
ING) TO ADAPT DEFLECTION SENSITIVITY
. TO THE CURRENT BEAM (HIGH VOLTAGE
VARIATION)
BUS ADJUSTED VERTICAL PARAMETERS :
. VERTICAL AMPLITUDE, VERTICAL POSI-
TION AND S-CORRECTION
EAST-WEST FUNCTION GENERATOR WITH
INTEGRATED ERROR AMPLIFIER (THUS,
. ONLY 1 EXTERNAL POWER DARLINGTON
IS NECESSARY FOR EW-FUNCTION)
BUS CONTROLLED EAST-WEST FUNC-
TIONS : EW-AMPLITUDE, HORIZONTAL
. WIDTH, EW-TILT AND EW-SHAPE (CORNER
CORRECTION)
OVERSIZE BLANKING (VERTICAL AND
HORIZONTAL) WHICH PERMIT ZOOM AND
SUBTITLE FACILITIES FOR 4/3 AND 16/9
CRTs
DESCRIPTION
The STV2145 is an I²C bus processor containing
the vertical deflection East-West functions and
oversize blanking. This circuit is foreseen as ADD-
ON for the Video Chroma Processor STV2118A
to permit 110° CRT applications covering standard
4/3 screen format and new 16/9 format with zoom
and subtitle facilities. STV2145 has been designed
to drive a standard TDA8172/8177 vertical booster
and an external transistor for East-West.
DIP16
(Plastic Package)
ORDER CODE : STV2145
PIN CONNECTIONS
I²C BUS SERIAL CLOCK SCL
1
I²C BUS SERIAL DATA SDA
2
VERTICAL RETRACE PULSE
(FROM STV2118A) ^VRET
3
REGULATOR OUTPUT _REG
4
FOR SERIES TRANSISTOR
REGULATED VOLTAGE SUPPLY
V_CC
5
LOOP FILTER FOR 2H-PLL LPF
6
VERTICAL AGC CAPACITOR CVERT
7
GROUND GND
8
16
SENSM _{RESISTOR BRIDGE}
15
SENSP ^{DIFFERENTIAL INPUT}
14
FROUT FRAME OUTPUT ERROR SIGNAL
13
EWOUT EAST-WEST ERROR AMPLIFIER OUTPUT
12
EWIN
EAST-WEST ERROR AMPLIFIER INPUT
11
OBLK OPEN COLLECTOR BLANKING SIGNAL
HORIZONTAL FLYBACK INPUT
10
HFLY
(CURRENT INPUT)
9
BREATH VERTICAL SIZE MODULATION
April 1996
1/17