STV0299B Datasheet, PDF (1/36 Pages) STMicroelectronics – QPSK/BPSK LINK IC

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STV0299B
QPSK/BPSK LINK IC
s MULTISTANDARD QPSK AND BPSK
DEMODULATION
s EASY IMPLEMENTATION WITH LOW COST
DIRECT CONVERSION TUNERS
s EXTREMELY
LOW
BER
WHEN
CO-CHANNEL INTERFERENCE
s WIDE CARRIER LOOP TRACKING RANGE TO
COMPENSATE FOR DISH FREQUENCY DRIFT
s COMMON INTERFACE COMPLIANT
s VERY LOW POWER CONSUMPTION
s INTEGRATED DUAL 6-BIT ANALOG TO
DIGITAL CONVERTERS
s DUAL DIGITAL AGC
s DIGITAL NYQUIST ROOT FILTER WITH
ROLL-OFF OF 0.35 OR 0.20
s DIGITAL CARRIER LOOP WITH LOCK
DETECTOR, ON-CHIP WIDE RANGE
DEROTATOR AND TRACKING LOOP
(TYP ± 45 MHz)
s DIGITAL TIMING RECOVERY WITH LOCK
DETECTOR
s CHANNEL BIT RATE UP TO 90 Mbps AND
SYMBOL FREQUENCY RATE FROM
1 TO 50 MSYMBOLS
s INNER DECODER:
- VITERBI SOFT DECODER FOR
CONVOLUTIONAL CODES, M=7, RATE 1/2
- PUNCTURED CODES 1/2, 2/3, 3/4, 5/6, 6/7 AND 7/8
s SYNCHROWORD EXTRACTION
s CONVOLUTIVE DEINTERLEAVER
s OUTER DECODER:
- REED-SOLOMON DECODER FOR
16 PARITY BYTES; CORRECTION OF UP
TO 8 BYTE ERRORS
- ENERGY DISPERSAL DESCRAMBLER
s ON-CHIP FLEXIBLE CLOCK SYSTEMS TO
ALLOW USE OF EXTERNAL CLOCK
SIGNALS IN 4 MHz TO 30 MHz RANGE
s EASY-TO-USE C/N ESTIMATOR WITH 2 TO
18 dB RANGE
s I²C SERIAL BUS AND REPEATER
s DVB COMMON INTERFACE COMPLIANT
PARALLEL OUTPUT FORMAT
s PARALLEL AND SERIAL DATA OUTPUT
s LNB SUPPLY CONTROL WITH STANDARD I/O,
22 KHz TONE AND DISEQC^TM MODULATOR
WITH TTL OUTPUT
s CMOS TECHNOLOGY: 2.5 V OPERATION;
JEDEC (EIA/JESD8-5)
TQFP64 (10 x 10 x 1.4 mm)
(Thin Plastic Quad Flat Pack)
ORDER CODE: STV0299B (No Slug)
APPLICATIONS
s DIGITAL SATELLITE
SET-TOP BOXES
RECEIVER
AND
DESCRIPTION
The STV0299 Satellite Receiver with FEC is a
CMOS single-chip multistandard demodulator for
digital satellite broadcasting. It consists of two A/D
converters for I-input and Q-input, a multistandard
QPSK and BPSK demodulator, and a forward
error correction (FEC) unit having both an inner
(Viterbi) and outer (Reed-Solomon) decoder.
The FEC unit is compliant with the DVB-S and
DSS^TM specifications. Processing is fully digital.
It integrates a derotator before the Nyquist root
filter, allowing a wide range of offset tracking.
The high sampling rate facilitates the
implementation of low-cost, direct conversion
tuners.
A variety of configurations and behaviours can be
selected through a bank of control/configuration
registers via an I²C. The chip outputs MPEG
Transport Streams and interfaces seamlessly to
the Packet Demultiplexers embedded in ST’s
ST20-TPx or STi55xx. High sampling frequency
(up to 90MHz) considerably reduces the cost of
LPF of direct conversion tuners.
The multistandard capability associated with a
broad range of input frequency operations makes
it easy-to-use. Its low power consumption, small
package and optional serial output interface
makes it perfect for embedding into a tuner.
May 2000
1/36
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.