STU10NC70Z Datasheet, PDF (1/10 Pages) STMicroelectronics – N-CHANNEL 700V - 0.58ohm - 9.4A Max220/I-Max220 Zener-Protected PowerMESH™III MOSFET

STU10NC70Z
STU10NC70ZI
N-CHANNEL 700V - 0.58Ω - 9.4A Max220/I-Max220
Zener-Protected PowerMESH™III MOSFET
TYPE
V_DSS
R_DS(on)
I_D
STU10NC70Z
STU10NC70ZI
700 V
700 V
<0.75Ω
<0.75Ω
9.4 A
9.4 A
s TYPICAL R_DS(on) = 0.58Ω
s EXTREMELY HIGH dv/dt CAPABILITY
s GATE-TO-SOURCE ZENER DIODES
s 100% AVALANCHE TESTED
s VERY LOW INTRINSIC CAPACITANCES
s GATE CHARGE MINIMIZED
DESCRIPTION
The third generation of MESH OVERLAY™ Power
MOSFETs for very high voltage exhibits unsur-
passed on-resistance per unit area while integrating
back-to-back Zener diodes between gate and
source. Such arrangement gives extra ESD capabil-
ity with higher ruggedness performance as request-
ed by a large variety of single-switch applications.
23
1
Max220
I-Max220
APPLICATIONS
s SINGLE-ENDED SMPS IN MONITORS,
COMPUTER AND INDUSTRIAL APPLICATION
s WELDING EQUIPMENT
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
V_DS
Drain-source Voltage (V_GS = 0)
V_DGR
Drain-gate Voltage (R_GS = 20 kΩ)
V_GS
Gate- source Voltage
I_D
Drain Current (continuos) at T_C = 25°C
I_D
Drain Current (continuos) at T_C = 100°C
I_DM (1) Drain Current (pulsed)
P_TOT
Total Dissipation at T_C = 25°C
Derating Factor
I_GS
Gate-source Current
V_ESD(G-S) Gate source ESD(HBM-C=100pF, R=15KΩ)
dv/dt(q) Peak Diode Recovery voltage slope
V_ISO
Insulation Winthstand Voltage (DC)
T_stg
Storage Temperature
T_j
Max. Operating Junction Temperature
(•)Pulse width limited by safe operating area
Sep 2000
Value
STU10NC70Z STU10NC70ZI
700
700
±25
9.4
9.4(*)
5.9
5.9(*)
37.6
37.6(*)
160
1.28
55
0.44
±50
4
3
--
2000
–65 to 150
150
(1)I_SD ≤9.4A, di/dt ≤100A/µs, V_DD ≤ V_(BR)DSS, T_j ≤ T_JMAX
(*)Limited only by maximum temperature allowed
Unit
V
V
V
A
A
A
W
W/°C
mA
KV
V/ns
V
°C
°C
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