STSJ18NF3LL Datasheet, PDF (1/9 Pages) STMicroelectronics – LOW GATE CHARGE STripFET II POWER MOSFET

STSJ18NF3LL
N-CHANNEL 30V - 0.016 Ω - 18A PowerSO-8™
LOW GATE CHARGE STripFET™ II POWER MOSFET
Table 1: General Features
TYPE
V_DSS
R_DS(on)
I_D
STSJ18NF3LL
30 V <0.019 Ω 18 A
■ TYPICAL R_DS(on) = 0.016 Ω @ 10V
■ TYPICAL Q_g = 12.5 nC @ 4.5 V
■ CONDUCTION LOSSES REDUCED
■ SWITCHING LOSSES REDUCED
■ IMPROVED JUNCTION-CASE THERMAL
RESISTANCE
Figure 1:Package
DESCRIPTION
This Power MOSFET is the latest development of
STMicroelectronics unique “Single Feature
Size™” strip-based process. This silicon, housed
in thermally improved SO-8™ package, exhibits
optimal on-resistance versus gate charge trade-
off plus lower R_thj-c.
PowerSO-8™
Figure 2: Internal Schematic Diagram
APPLICATIONS
■ SPECIFICALLY DESIGNED AND OPTIMISED
FOR HIGH EFFICIENCY CPU CORE DC/DC
CONVERTERS FOR MOBILE PC_S
DRAIN CONTACT ALSO ON THE BACKSIDE
Table 2: Order Codes
SALES TYPE
STSJ18NF3LL
MARKING
18F3LL)
PACKAGE
PowerSO-8
Table 3: ABSOLUTE MAXIMUM RATING
Symbol
Parameter
V_DS
Drain-source Voltage (V_GS = 0)
V_DGR
Drain-gate Voltage (R_GS = 20 kΩ)
V_GS
Gate- source Voltage
I_D
Drain Current (continuous) at T_C = 25°C (*)
I_D
Drain Current (continuous) at T_C = 100°C(*)
I_DM(•) Drain Current (pulsed)
P_tot
Total Dissipation at T_C = 25°C
Total Dissipation at T_C = 25°C (#)
(•) Pulse width limited by safe operating area.
Value
30
30
± 16
18
18
72
70
3
(*) Value limited by wires bonding
PACKAGING
TAPE & REEL
Unit
V
V
V
A
A
A
W
W
March 2005
Rev. 1.0
1/9