STS8DNF3LL Datasheet, PDF (1/8 Pages) STMicroelectronics – DUAL N-CHANNEL 30V - 0.017 ohm - 8A SO-8 LOW GATE CHARGE STripFET™ II POWER MOSFET

STS8DNF3LL
DUAL N-CHANNEL 30V - 0.017 Ω - 8A SO-8
LOW GATE CHARGE STripFET™ II POWER MOSFET
TYPE
V_DSS
R_DS(on)
I_D
STS8DNF3LL
30 V <0.020 Ω
8A
s TYPICAL R_DS(on) = 0.017Ω
s OPTIMAL R_DS(on) x Qg TRADE-OFF @ 4.5V
s CONDUCTION LOSSES REDUCED
s SWITCHING LOSSES REDUCED
DESCRIPTION
This application specific Power MOSFET is the second
generation of STMicroelectronis unique "Single Feature
Size™" strip-based process. The resulting transistor
shows the best trade-off between on-resistance and gate
charge. When used as high and low side in buck
regulators, it gives the best performance in terms of both
conduction and switching losses. This is extremely
important for motherboards where fast switching and
high efficiency are of paramount importance.
APPLICATIONS
s SPECIFICALLY DESIGNED AND OPTIMISED
FOR HIGH EFFICIENCY CPU CORE DC/DC
CONVERTERS FOR MOBILE PC_S
SO-8
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
V_DS
V_DGR
V_GS
I_D
Drain-source Voltage (V_GS = 0)
Drain-gate Voltage (R_GS = 20 kΩ)
Gate- source Voltage
Drain Current (continuous) at T_C = 25°C
Single Operation
Drain Current (continuous) at T_C = 100°C
Single Operation
I_DM(•) Drain Current (pulsed)
P_tot
Total Dissipation at T_C = 25°C Dual operating
Total Dissipation at T_C = 25°C Single operating
(•) Pulse width limited by safe operating area.
October 2002
.
Value
30
30
± 16
8
5
32
2
1.6
Unit
V
V
V
A
A
W
W
1/8