STP80N05-09 Datasheet, PDF (1/9 Pages) STMicroelectronics – N - CHANNEL ENHANCEMENT MODE ULTRA HIGH DENSITY POWER MOS TRANSISTOR

STP80N05-09
N - CHANNEL ENHANCEMENT MODE
”ULTRA HIGH DENSITY” POWER MOS TRANSISTOR
TYPE
ST P8 0N05 -09
V_{DS S}
50 V
R_{DS(o n)}
< 0.009 Ω
I_D
80 A
s ULTRA HIGH DENSITY TECHNOLOGY
s TYPICAL RDS(on) = 7 mΩ
s AVALANCHE RUGGED TECHNOLOGY
s LOW GATE CHARGE
s HIGH CURRENT CAPABILITY
s 175 ^oC OPERATING TEMPERATURE
APPLICATIONS
s SYNCROUNOUS RECTIFIERS
s HIGH CURRENT, HIGH SPEED SWITCHING
s DC-DC & DC-AC CONVERTER ABSOLUTE
MAXIMUM RATINGS
3
2
1
TO-220
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
S ym bol
P ar a mete r
V_DS Drain-source Vo ltage (V_GS = 0)
VDGR Drain- gate Vol tage (RGS = 20 kΩ)
V_GS Gate-s ource Vol tage
I_D
Drain Current (conti nuous) at T_c = 25 ^oC
ID
Drain Current (conti nuous) at Tc = 100 ^oC
I_DM(•) Drain Current (pul sed)
P_tot Total Dis sipation at T_c = 25 ^oC
Derating Fac tor
dV/dt(1) Peak Diode Recov ery vo ltage slo pe
T_stg Storage Temperature
Tj Max. Operating Junction Temperature
(•) Pulse width limited by safe operating area
March 1997
Value
Unit
50
V
50
V
± 20
V
80
A
60
A
3 20
A
1 50
W
1
W/^oC
5
V/ns
-65 to 175
o_C
1 75
o_C
(1) ISD ≤ 60 A, di/dt ≤ 200 A/ms, VDD ≤ V(BR)DSS, TJ ≤ TJMAX
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