STP7NB40 Datasheet, PDF (1/4 Pages) STMicroelectronics – N - CHANNEL ENHANCEMENT MODE PowerMESH MOSFET

STP7NB40
STP7NB40FP
N - CHANNEL ENHANCEMENT MODE
PowerMESH™ MOSFET
TYPE
VDSS
RDS(on)
ID
STP7NB40
STP7NB40FP
400 V
400 V
< 0.9 Ω
< 0.9 Ω
7.0 A
4.4 A
s TYPICAL RDS(on) = 0.75 Ω
s EXTREMELY HIGH dV/dt CAPABILITY
s 100% AVALANCHE TESTED
s VERY LOW INTRINSIC CAPACITANCES
s GATE CHARGE MINIMIZED
DESCRIPTION
Using the latest high voltage MESH OVERLAY™
process, SGS-Thomson has designed an
advanced family of power MOSFETs with
outstanding performances. The new patent
pending strip layout coupled with the Company’s
proprietary edge termination structure, gives the
lowest RDS(on) per area, exceptional avalanche
and dv/dt capabilities and unrivalled gate charge
and switching characteristics.
PRELIMINARY DATA
3
2
1
TO-220
3
2
1
TO-220FP
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
s HIGH CURRENT, HIGH SPEED SWITCHING
s SWITCH MODE POWER SUPPLIES (SMPS)
s DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVE
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
STP7NB40 STP7NB40FP
VDS Drain-source Voltage (VGS = 0)
400
V
VDGR
VGS
ID
ID
IDM(•)
Ptot
Drain- gate Voltage (RGS = 20 kΩ)
Gate-source Voltage
Drain Current (continuous) at Tc = 25 ^oC
Drain Current (continuous) at Tc = 100 ^oC
Drain Current (pulsed)
Total Dissipation at Tc = 25 ^oC
Derating Factor
400
± 30
7
4.4
4.4
2.8
28
28
100
35
0.8
0.28
V
V
A
A
A
W
W/^oC
dv/dt(1) Peak Diode Recovery voltage slope
4.5
4.5
V/ns
VISO Insulation Withstand Voltage (DC)

2000
V
Tstg Storage Temperature
-65 to 150
o_C
Tj
Max. Operating Junction Temperature
150
o_C
(•) Pulse width limited by safe operating area
(1) ISD ≤ 7A, di/dt ≤ 200 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
January 1998
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