STP7NB30 Datasheet, PDF (1/9 Pages) STMicroelectronics – N - CHANNEL 300V - 0.75ohm - 7A - TO-220/TO-220FP PowerMESH MOSFET

STP7NB30
®
STP7NB30FP
N - CHANNEL 300V - 0.75Ω - 7A - TO-220/TO-220FP
PowerMESH™ MOSFET
TYPE
VDSS
RDS(on)
ID
ST P7NB3 0
300 V < 0.90 Ω
7A
ST P7NB3 0FP
300 V < 0.90 Ω
4A
s TYPICAL R_DS(on) = 0.75 Ω
s EXTREMELY HIGH dv/dt CAPABILITY
s 100% AVALANCHE TESTED
s VERY LOW INTRINSIC CAPACITANCES
s GATE CHARGE MINIMIZED
DESCRIPTION
Using the latest high voltage MESH OVERLAY™
process, STMicroelectronics has designed an
advanced family of power MOSFETs with
outstanding performances. The new patent
pending strip layout coupled with the Company’s
proprietary edge termination structure, gives the
lowest RDS(on) per area, exceptional avalanche
and dv/dt capabilities and unrivalled gate charge
and switching characteristics.
3
2
1
TO-220
3
2
1
TO-220FP
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
s HIGH CURRENT, HIGH SPEED SWITCHING
s SWITCH MODE POWER SUPPLIES (SMPS)
s DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVE
ABSOLUTE MAXIMUM RATINGS
Sy mb o l
P a ramet er
V_DS Drain-source Voltage (V_GS = 0)
V _DGR
V_GS
I_D
I_D
I_DM (•)
Ptot
Drain- gate Voltage (R_GS = 20 kΩ)
G ate-source Voltage
Drain Current (continuous) at T_c = 25 ^oC
Drain Current (continuous) at T_c = 100 ^oC
Drain Current (pulsed)
T otal Dissipat ion at Tc = 25 ^oC
Derating Factor
dv/dt(1) Peak Diode Recovery voltage slope
V_ISO I nsulation W ithstand Voltage (DC)
T_stg Storage Temperature
T_j
Max. Operating Junction Temperature
(•) Pulse width limited by safe operating area
August 1999
Va l u e
ST P7NB30 STP7NB30F P
300
300
± 30
7
4
4.4
2.5
28
28
85
30
0.68
0.24
5.5
5.5

2000
-65 to 150
150
( 1) ISD ≤ 7A, di/dt ≤ 200 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX
Un it
V
V
V
A
A
A
W
W /^o C
V/ns
V
o_C
o_C
1/9