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STP6NC80Z Datasheet, PDF (1/13 Pages) STMicroelectronics – N-CHANNEL 800V - 1.5ohm - 5.4A TO-220/FP/D²PAK/I²PAK Zener-Protected PowerMESH™III MOSFET
STP6NC80Z - STP6NC80ZFP
STB6NC80Z - STB6NC80Z-1
N-CHANNEL 800V - 1.5Ω - 5.4A TO-220/FP/D²PAK/I²PAK
Zener-Protected PowerMESH™III MOSFET
TYPE
VDSS
RDS(on)
ID
STP6NC80Z/FP
800V
< 1.8 Ω
5.4 A
STB6NC80Z/-1
800V
< 1.8 Ω
5.4 A
s TYPICAL RDS(on) = 1.5 Ω
s EXTREMELY HIGH dv/dt AND CAPABILITY
GATE-TO- SOURCE ZENER DIODES
s 100% AVALANCHE TESTED
s VERY LOW GATE INPUT RESISTANCE
s GATE CHARGE MINIMIZED
DESCRIPTION
The third generation of MESH OVERLAY™ Power
MOSFETs for very high voltage exhibits unsurpassed
on-resistance per unit area while integrating back-to-
back Zener diodes between gate and source. Such ar-
rangement gives extra ESD capability with higher rug-
gedness performance as requested by a large variety
of single-switch applications.
APPLICATIONS
s SINGLE-ENDED SMPS IN MONITORS,
COMPUTER AND INDUSTRIAL APPLICATION
s WELDING EQUIPMENT
TO-220
3
1
D²PAK
3
2
1
TO-220FP
123
I²PAK
(Tabless TO-220)
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
VDS
Drain-source Voltage (VGS = 0)
VDGR
Drain-gate Voltage (RGS = 20 kΩ)
VGS
Gate- source Voltage
ID
Drain Current (continuous) at TC = 25°C
ID
Drain Current (continuous) at TC = 100°C
IDM (1) Drain Current (pulsed)
PTOT
Total Dissipation at TC = 25°C
Derating Factor
IGS
Gate-source Current (q)
VESD(G-S) Gate source ESD(HBM-C=100pF, R=15KΩ)
dv/dt
Peak Diode Recovery voltage slope
VISO
Insulation Winthstand Voltage (DC)
Tstg
Storage Temperature
Tj
Max. Operating Junction Temperature
(•)Pulse width limited by safe operating area
December 2002
Value
Unit
STP(B)6NC80Z(-1) STP6NC80ZFP
800
V
800
V
± 25
V
5.4
5.4(*)
A
3.4
3.4(*)
A
21
21(*)
A
125
40
W
1
0.32
W/°C
±50
mA
3
KV
3
V/ns
--
2000
V
–65 to 150
°C
150
°C
(1)ISD ≤5.4A, di/dt ≤100A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX
.(*)Pulse width Limited by maximum temperature allowed 1/13