STP55NF06L Datasheet, PDF (1/12 Pages) STMicroelectronics – N-CHANNEL 60V - 0.014ohm - 55A TO-220/FP/D2PAK/I2PAK STripFET™II POWER MOSFET

STP55NF06L - STP55NF06LFP
STB55NF06L - STB55NF06L-1
N-CHANNEL 60V - 0.014Ω - 55A TO-220/FP/D²PAK/I²PAK
STripFET™II POWER MOSFET
TYPE
V_DSS
R_DS(on)
STP55NF06L
STP55NF06LFP
STB55NF06L
STB55NF06L-1
60 V
60 V
60 V
60 V
<0.018 Ω
<0.018 Ω
<0.018 Ω
<0.018 Ω
s TYPICAL R_DS(on) = 0.014Ω
s EXCEPTIONAL dv/dt CAPABILITY
s APPLICATION ORIENTED
CHARACTERIZATION
I_D
55 A
55 A
55 A
55 A
DESCRIPTION
This Power Mosfet is the latest development of
STMicroelectronics unique “Single Feature
Size™” strip-based process. The resulting tran-
sistor shows extremely high packing density for
low on-resistance, rugged avalance characteris-
tics and less critical alignment steps therefore a re-
markable manufacturing reproducibility.
APPLICATIONS
s HIGH CURRENT, HIGH SPEED SWITCHING
s MOTOR CONTROL, AUDIO AMPLIFIERS
s DC-DC & DC-AC CONVERTERS
s AUTOMOTIVE ENVIRONMENT (INJECTION,
ABS, AIR-BAG, LAMPDRIVERS, Etc.)
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
V_DS
Drain-source Voltage (V_GS = 0)
V_DGR
Drain-gate Voltage (R_GS = 20 kΩ)
V_GS
Gate- source Voltage
I_D
Drain Current (continuous) at T_C = 25°C
I_D
Drain Current (continuous) at T_C = 100°C
I_DM (l) Drain Current (pulsed)
P_TOT
Total Dissipation at T_C = 25°C
Derating Factor
dv/dt (2) Peak Diode Recovery voltage slope
E_AS (1) Single Pulse Avalanche Energy
V_ISO
Insulation Withstand Voltage (DC)
T_stg
Storage Temperature
T_j
Max. Operating Junction Temperature
(q) Pulse width limited by safe operating area
August 2002
3
2
1
TO-220
3
2
1
TO-220FP
3
1
D²PAK
123
I²PAK
INTERNAL SCHEMATIC DIAGRAM
Value
STP55NF06L
STB55NF06L/-1
STP55NF06LFP
60
60
± 16
55
30
39
21
220
120
95
30
0.63
0.2
20
300
-
2500
Unit
V
V
V
A
A
A
W
W/°C
V/ns
mJ
V
– 55 to 175
°C
(1) Starting T_j=25°C, I_D=27.5A, V_DD=30V
(2) ISD ≤ 55 A, di/dt ≤ 200A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX. 1/12