STP4NB100 Datasheet, PDF (1/9 Pages) STMicroelectronics – N - CHANNEL 1000V - 4ohm - 3.8A - TO-220/TO-220FP PowerMESH MOSFET

STP4NB100
®
STP4NB100FP
N - CHANNEL 1000V - 4Ω - 3.8A - TO-220/TO-220FP
PowerMESH™ MOSFET
TYPE
VDSS
RDS(on)
ID
ST P4NB1 00
1000 V
STP4NB100FP 1000 V
< 4.4 Ω
< 4.4 Ω
3.8 A
3.8 A
s TYPICAL R_DS(on) = 4 Ω
s EXTREMELY HIGH dv/dt CAPABILITY
s 100% AVALANCHE TESTED
s VERY LOW INTRINSIC CAPACITANCES
s GATE CHARGE MINIMIZED
DESCRIPTION
Using the latest high voltage MESH OVERLAY™
process, STMicroelectronics has designed an
advanced family of power MOSFETs with
outstanding performances. The new patent
pending strip layout coupled with the Company’s
proprietary edge termination structure, gives the
lowest RDS(on) per area, exceptional avalanche
and dv/dt capabilities and unrivalled gate charge
and switching characteristics.
3
2
1
TO-220
3
2
1
TO-220FP
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
s HIGH CURRENT, HIGH SPEED SWITCHING
s SWITCH MODE POWER SUPPLIES (SMPS)
s DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVE
ABSOLUTE MAXIMUM RATINGS
Sy mb o l
P a ramet er
V_DS Drain-source Voltage (V_GS = 0)
V _DGR
V_GS
I_D
I_D
Drain- gate Voltage (R_GS = 20 kΩ)
Gate-source Voltage
Drain Current (continuous) at T_c = 25 ^oC
Drain Current (continuous) at T_c = 100 ^oC
I_DM (•) Drain Current (pulsed)
P_tot T otal Dissipation at T_c = 25 ^oC
Derating Factor
dv/dt(1) Peak Diode Recovery voltage slope
V_ISO Insulation Withstand Voltage (DC)
T_{s tg} Storage Temperat ure
T_j Max. Operating Junction T emperature
(•) Pulse width limited by safe operating area
(*) Limited only by maximum temperature allowed
October 1999
Va l u e
Un it
STP4NB100 ST P4NB100F P
1000
V
1000
V
± 30
V
3.8
3.8(*)
A
2.4
2.4(*)
A
15.2
15.2
A
125
40
W
1
0.32
W /^o C
4
4
V/ns

2000
V
-65 to 150
o_C
150
o_C
( 1) ISD ≤ 3.8A, di/dt ≤ 200 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX
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