STP4NA60FP Datasheet, PDF (1/5 Pages) STMicroelectronics – N - CHANNEL ENHANCEMENT MODE FAST POWER MOS TRANSISTOR

STP4NA60FP
N - CHANNEL ENHANCEMENT MODE
FAST POWER MOS TRANSISTOR
TYPE
S T P 4N A 60 F P
VDSS
600 V
RDS(on)
< 2.2 Ω
ID
2.7 A
s TYPICAL R_DS(on) = 1.85 Ω
s ± 30V GATE TO SOURCE VOLTAGE RATING
s 100% AVALANCHE TESTED
s REPETITIVE AVALANCHE DATA AT 100^oC
s LOW INTRINSIC CAPACITANCES
s GATE CHARGE MINIMIZED
s REDUCED THRESHOLD VOLTAGE SPREAD
DESCRIPTION
This series of POWER MOSFETS represents
the most advanced high voltage technology.
The optmized cell layout coupled with a new
proprietary edge termination concur to give
the device low RDS(on) and gate charge,
unequalled ruggedness and superior
switching performance.
APPLICATIONS
s HIGH CURRENT, HIGH SPEED SWITCHING
s SWITCH MODE POWER SUPPLIES (SMPS)
s DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVE
PRELIMINARY DATA
3
2
1
TO-220FP
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
VDS
V_{D GR}
Drain-source Voltage (VGS = 0)
Drain- gate Voltage (R_GS = 20 kΩ)
VGS Gate-source Voltage
I_D
Drain Current (continuous) at T_c = 25 ^oC
ID
Drain Current (continuous) at Tc = 100 ^oC
IDM(•)
P_tot
Drain Current (pulsed)
Total Dissipation at T_c = 25 ^oC
Derating Factor
VISO Insulation W it hst and Volt age (DC)
Tstg St orage Temperature
T_j
Max. Operating Junction Temperature
(•) Pulse width limited by safe operating area
October 1997
Valu e
600
600
± 30
2.7
1.8
17.2
35
0.28
2000
-65 to 150
150
Unit
V
V
V
A
A
A
W
W/^oC
V
o_C
o_C
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