STP3NB100 Datasheet, PDF (1/6 Pages) STMicroelectronics – N - CHANNEL 1000V - 5.3 ohm - 3 A - TO-220/TO-220FP PowerMESH MOSFET

STP3NB100
STP3NB100FP
N - CHANNEL 1000V - 5.3 Ω - 3 A - TO-220/TO-220FP
PowerMESH™ MOSFET
TYPE
V_DSS
R_DS(on)
I_D
ST P3N B10 0
1000 V
<6Ω
3A
STP3NB100FP 1000 V
<6Ω
3A
s TYPICAL R_DS(on) = 5.3 Ω
s EXTREMELY HIGH dv/dt CAPABILITY
s 100% AVALANCHE TESTED
s VERY LOW INTRINSIC CAPACITANCES
s GATE CHARGE MINIMIZED
DESCRIPTION
Using the latest high voltage MESH OVERLAY™
process, STMicroelectronics has designed an
advanced family of power MOSFETs with
outstanding performances. The new patent
pending strip layout coupled with the Company’s
proprietary edge termination structure, gives the
lowest RDS(on) per area, exceptional avalanche
and dv/dt capabilities and unrivalled gate charge
and switching characteristics.
TARGET DATA
3
2
1
TO-220
3
2
1
TO-220FP
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
s HIGH CURRENT, HIGH SPEED SWITCHING
s SWITCH MODE POWER SUPPLIES (SMPS)
s DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVE
ABSOLUTE MAXIMUM RATINGS
Sy mb o l
Parameter
V_DS Drain-source Voltage (V_GS = 0)
V _DGR
V_GS
I_D
I_D
Drain- gate Voltage (R_GS = 20 kΩ)
Gate-source Voltage
Drain Current (continuous) at T_c = 25 ^oC
Drain Current (continuous) at T_c = 100 ^oC
I_DM (•) Drain Current (pulsed)
Ptot Total Dissipation at Tc = 25 ^oC
Derating Factor
dv/dt(1) Peak Diode Recovery voltage slope
V_ISO I nsulat ion W ithstand Voltage (DC)
T_stg Storage Temperature
T_j
Max. Operating Junction Temperature
(•) Pulse width limited by safe operating area
(**) Limited only by TMAX
October 1998
Value
STP3NB100 STP3NB100FP
1000
1000
± 30
3
3(**)
1.9
1.1
12
12
100
35
0.8
0.28
4.5
4.5

2000
-65 to 150
150
( 1) ISD ≤ 3 Α, di/dt ≤ 200 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX
Un it
V
V
V
A
A
A
W
W /^o C
V/ns
V
o_C
o_C
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